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| CML Microcircuits COMMUNICA TION SEMICONDUCTORS D/808A/6 September 2003 CMX808A Family Radio CTCSS `Type 2' Encoder and Decoder 1.0 * * * * * Features Unique CTCSS `Type 2' Operation Fast Decode on all Tones (140ms) Tones from 60Hz to 251Hz Tone Cloning Low Power Operation (1.3mA at 3.0V) * * * * * High Performance Encode/Decode Flexible Multiple Decode Options Sub-Audio Tone Rejection Filter 48 Programmable CTCSS Tones Compact 20-pin TSSOP Package Applications * * * * Family Radio Service (FRS) Handportables Amateur Radio Equipment General Mobile Radio Service (GMRS) Short Range Business Radio 1.1 Brief Description This device is a unique product for the designer of family radio transceivers. Offering leading edge performance while also being highly cost effective. The device is simple to interface to a host of Controllers via the serial programming interface. A full range of 48 tones can be generated and detected by the device. The decode time has been vastly improved from that offered by other solutions. Fast response and de-response gives the user of a family radio transceiver faster switching times and a reduction in the annoying squelch tail often found in CTCSS based systems. The device has very low power consumption operating at a minimum of 3.0V. A unique feature of the device is its ability to look for 7 different CTCSS codes simultaneously. This allows FRS designers to offer equipment which can look for personal, family or open channel codes at the same time. For example a soccer team coach can call each of the 11 players individually or the team as a group. Codes can be used as Paging codes, open chat mode codes as well as personal and family codes. These features allow FRS designers to differentiate their products from that of the competition in unique ways to gain market share in this highly competitive application. The CMX808A opens the way to rapid development of new family radio applications. 2003 CML Microsystems Plc Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A CONTENTS Section Page 1.0 1.2 1.3 1.4 1.5 1.6 Features ................................................................................................ 1 Block Diagram.................................................................................... 3 Signal List ............................................................................................ 4 External Components ..................................................................... 6 General Description......................................................................... 7 1.5.1 Software Description ................................................................. 7 Application Notes ........................................................................... 14 1.6.1 1.6.2 1.6.3 1.6.4 1.6.5 General...................................................................................... 14 Transmitter ............................................................................... 14 Receiver (Decode).................................................................... 14 Tx Tone Table........................................................................... 15 Rx Tone Table........................................................................... 16 1.7 Performance Specification ......................................................... 17 1.7.1 1.7.2 Electrical Performance ............................................................ 17 Packaging ................................................................................. 21 2003 CML Microsystems Plc 2 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A 1.2 Block Diagram Figure 1 Block Diagram 2003 CML Microsystems Plc 3 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A 1.3 Signal List Package E3 P4 Signal Description Pin No. 1 2 Pin No. 1 2 XTALN Name Type O/P I/P The inverted output of the on-chip oscillator. The input to the on-chip oscillator, for external Xtal circuit or clock. The "C-BUS" serial clock input. This clock, produced by the Controller, is used for transfer timing of commands and data to and from the device. See "C-BUS" Timing Diagram (Figure 4). The "C-BUS" serial data input from the Controller. Data is loaded into this device in 8-bit bytes, MSB (D7) first, and LSB (D0) last, synchronised to the SERIAL CLOCK. See "C-BUS" Timing Diagram (Figure 4). The "C-BUS" serial data output to the Controller. The transmission of REPLY DATA bytes is synchronised to the SERIAL CLOCK under the control of the CSN input. This 3-state output is held at high impedance when not sending data to the Controller. See "C-BUS" Timing Diagram (Figure 4). The "C-BUS" data loading control function: this input is provided by the Controller. Data transfer sequences are initiated, completed or aborted by the CSN signal. See "C-BUS" Timing Diagram (Figure 4). This output indicates an interrupt condition to the Controller by going to a logic "0". This is a "wire-ORable" output, enabling the connection of up to 8 peripherals to 1 interrupt port on the Controller. This pin has a low impedance pulldown to logic "0" when active and a highimpedance when inactive. An external pullup resistor is required. An interrupt is effective if not masked out by the IRQ MASK (bit 0 in the SUB-AUDIO CONTROL register $80). XTAL/CLOCK 3 3 SERIAL CLOCK I/P 4 4 COMMAND DATA I/P 5 5 REPLY DATA O/P 6 6 CSN I/P 7 7 IRQN O/P 2003 CML Microsystems Plc 4 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A 1.3 Signal List (continued) Package E3 P4 Signal Description Pin No. 8 Pin No. 8 9 10 NC NC Name Type ) No internal connection. Do not make ) any connection to these pins. O/P An internal reference voltage for the A to D, decoupled to VSS by an external capacitor. No internal connection. Do not make any connection to this pin. Power O/P The negative supply rail (ground). A bias line for the internal circuitry, held at 1/2 VDD. This pin must be decoupled by a capacitor mounted close to the device pins. The inverting input to the Rx input amplifier. The output of the Rx input amplifier and the input to the audio filter section. Output of the Rx audio filter section. No internal connection. Do not make any connection to this pin. I/P O/P I/P O/P O/P Input to the Tx audio filter section. Output of the Tx audio filter section. Input to the audio volume control. Output of the CTCSS tone generator. Output of the audio volume control. No internal connection. Do not make any connection to this pin. Power The positive supply rail. Levels and voltages are dependent upon this supply. This pin should be decoupled to VSS by a capacitor. 9 A/D CAP 11 NC 10 11 12 13 Vss VBIAS 12 13 14 15 RX AMP IN RX AMP OUT I/P O/P 14 16 17 RX AUDIO OUT NC O/P 15 16 17 18 19 18 19 20 21 22 23 TX AUDIO IN TX AUDIO OUT VOLUME IN TX SUB AUDIO OUT VOLUME OUT NC 20 24 VDD Notes: I/P = Input O/P = Output 2003 CML Microsystems Plc 5 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A 1.4 External Components C1 C2 C3 C4 C5 C6 C7 C8 22pF 22pF 0.1F 0.1F 100pF 0.1F Note 1 0.1F 20% 20% 20% 20% 20% 20% 20% 20% R1 R2 R3 R4 1M 22k 100k Note 1 5% 10% 10% 10% X1 4.0MHz 100ppm Note: 1. R3, R4, C5 and C7 form the gain components for the Rx Input Amplifier. R4 should be chosen as required by the signal level, using the following formula: Gain =- R3 R4 C7 x R4 should be chosen so as not to compromise the low frequency performance of this product. Figure 2 Recommended External Components 2003 CML Microsystems Plc 6 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A 1.5 General Description The CMX808A is a programmable CTCSS `Type 2' encoder and decoder for Family Radio, see Figure 1. The receiver of the CMX808A decodes a user-programmable set of up to 7 tones with minimum software intervention; the band-pass filter is designed to filter out the CTCSS sub-audio tones. A high resolution tone encoder performs accurate generation of CTCSS tones. Each function, and the routing of signals, is flexible and may be configured or controlled by the user's software. 1.5.1 Software Description Address/Commands Instructions and data are transferred, via "C-BUS", in accordance with the timing information given in Figure 6. Instruction and data transactions to and from the CMX808A consist of an Address/Command (A/C) byte which may be followed by either: (i) (ii) 8-bit Write Only Registers HEX ADDRESS/ COMMAND $01 REGISTER NAME BIT 7 (D7) BIT 6 (D6) BIT 5 (D5) BIT 4 (D4) BIT 3 (D3) BIT 2 (D2) BIT 1 (D1) BIT 0 (D0) a further instruction or data (1 or 2 bytes) or a status or Rx data reply (1 byte) GENERAL RESET SUB-AUDIO CONTROL AUDIO CONTROL N/A N/A N/A N/A N/A N/A N/A N/A CTCSS IRQ MASK LSB BIT 0 $80 CTCSS TX DECODER ENABLE ENABLE TX BPF ENABLE RX BPF ENABLE $82 CTCSS DECODER BANDWIDTH MSB LSB 0 BIT 3 BIT 2 BIT 1 BIT 0 AUDIO ATTENUATION BPF MSB UN-MUTE BIT 4 BIT 3 BIT 2 BIT 1 16-bit Write Only Registers HEX ADDRESS/ COMMAND REGISTER NAME CTCSS TX FREQ. (Byte 1) CTCSS TX FREQ. (Byte 2) CTCSS RX PROGRAM (Byte 1) CTCSS RX PROGRAM (Byte 2) BIT 7 (D7) CTCSS TX NOTONE BIT 6 (D6) BIT 5 (D5) BIT 4 (D4) BIT 3 (D3) BIT 2 (D2) BIT 1 (D1) BIT 0 (D0) 0 0 $83 CTCSS TX FREQUENCY MSB BIT 12 BIT 11 BIT 10 BIT 9 CTCSS TX FREQUENCY BIT 8 LSB BIT 0 BIT 7 0 $84 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 CTCSS TONE ADDRESS CTCSS FREQUENCY MSB LSB MSB BIT2 BIT 1 BIT 0 BIT 11 BIT 10 BIT 9 CTCSS FREQUENCY BIT6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 8 LSB BIT 0 BIT 7 2003 CML Microsystems Plc 7 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A Write Only Register Description GENERAL RESET (Hex address $01) The reset command has no data attached to it. It sets the device registers to zero (all powersaved) with the exception of Bits 2, 1 and 0 of the SUB-AUDIO STATUS register $81. SUB-AUDIO CONTROL Register (Hex address $80) This register is used to control the functions of the device as described below: CTCSS TX ENABLE and DECODER ENABLE (Bits 7 and 6) These two bits enable and disable the CTCSS decoder (Rx) or transmitter (Tx) according to the table below: Tx Bit 7 0 0 1 1 CTCSS DECODER BANDWIDTH (Bits 5, 4, 3 and 2) Rx Bit 6 0 1 0 1 Function Tx disabled, Rx disabled Tx disabled, Rx enabled Tx enabled, Rx disabled Tx enabled, Rx enabled These four bits set the bandwidth of the CTCSS tone decoder according to the table below: BANDWIDTH Will Will Not Decode Decode 1.1% 2.4% 1.3% 2.7% 1.6% 2.9% 1.8% 3.2% 2.0% 3.5% 2.2% 3.7% 2.5% 4.0% 2.7% 4.2% Bit 5 1 1 1 1 1 1 1 1 (Bit 1) CTCSS IRQ MASK (Bit 0) Bit 4 0 0 0 0 1 1 1 1 Bit 3 0 0 1 1 0 0 1 1 Bit 2 0 1 0 1 0 1 0 1 Reserved for future use. This bit should be set to "0". When this bit is set to "1" it enables the interrupt. When this bit is set to "0" the interrupt is masked. AUDIO CONTROL Register (Hex address $82) This register is used to control the functions of the device as described below: Note: TX BPF ENABLE (Bit 7) and RX BPF ENABLE (Bit 6) should not be enabled at the same time. TX BPF ENABLE (Bit 7) When this bit is "1" the audio band-pass filter is enabled and the output of the filter is switched to TX AUDIO OUT. The output is then controlled by BPF UNMUTE. See Bit 5 below. When this bit is "0" the audio band pass filter is disabled (powersaved) and the output of the filter is disconnected from TX AUDIO OUT, which is then in a high impedance state. 2003 CML Microsystems Plc 8 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A RX BPF ENABLE (Bit 6) When this bit is "1" the audio band-pass filter is enabled and the output of the filter is switched to RX AUDIO OUT. The output is then controlled by BPF UNMUTE. See Bit 5 below. When this bit is "0" the audio band-pass filter is disabled (powersaved) and the output of the filter is disconnected from RX AUDIO OUT, which is then in a high impedance state. BPF UN-MUTE (Bit 5) When this bit is "1" and TX BPF ENABLE is "1" the audio band-pass filter output is switched to the TX AUDIO OUT pin. When this bit is "0" the output of the filter is disconnected from TX AUDIO OUT, which is then in a high impedance state. This control, along with TX BPF ENABLE, allows the filter to power up and settle internally before switching the output on, when coming out of powersave. When this bit is "1" and RX BPF ENABLE is "1" the audio band-pass filter output is switched to the RX AUDIO OUT pin. When this bit is "0" the output of the filter is disconnected from RX AUDIO OUT, which is then in a high impedance state. This control, along with RX BPF ENABLE, allows the filter to power up and settle internally before switching the output on, to avoid clicks when coming out of powersave. AUDIO ATTENUATION (Bits 4, 3, 2, 1, and 0) These five bits are used to set the attenuation of the audio volume control according to the table below: 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Bits 2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Audio Attenuation Off (VBIAS) 48.0dB 46.4dB 44.8dB 43.2dB 41.6dB 40.0dB 38.4dB 36.8dB 35.2dB 33.6dB 32.0dB 30.4dB 28.8dB 27.2dB 25.6dB 24.0dB 22.4dB 20.8dB 19.2dB 17.6dB 16.0dB 14.4dB 12.8dB 11.2dB 9.6dB 8.0dB 6.4dB 4.8dB 3.2dB 1.6dB 0dB 2003 CML Microsystems Plc 9 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A CTCSS TX FREQUENCY Register (Hex address $83) This is a 16-bit register. Byte (1) is sent first. When the CTCSS transmitter is enabled, the bits 0 to 12 control the frequency of the transmitted CTCSS tones according to the formula below. A= fXTAL (Hz) 16 x fTONE (Hz) where A is the binary number programmed into the 13 bits. When Bit 7 (in the first 8 bits) is set to "1" the tone output is set at VBIAS or NOTONE without regard to the number "A" programmed. When Bit 7 is "0" the programmed tone is set on the output. Programming bits 0 to 12 to "0" sets the output to VBIAS. Powersave is achieved by disabling the Tx (Bit 7 in the SUBAUDIO CONTROL register $80). CTCSS RX PROGRAM Register (Hex address $84) This is a 16-bit register. Byte (1) is sent first. The two bytes are used to program the centre frequencies of up to 7 tones in the sub-audio band that will be decoded by the receiver. Each tone is identified by its address in Bits 6, 5 and 4 of byte (1). The remaining 12 bits contain the data representing the tone frequency according to the formula below. If a tone is not required the 12 bits should be set to zero. Byte 1 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 Byte 2 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 <----------------------- N -----------------------> N is the binary representation of the following decimal number (n): n = INT (948982 x fTONE / fXTAL) <----------------------- R -----------------------> R is the nearest 6-bit binary representation of (r), where: r = ((237245/fXTAL) - (n/(4 x fTONE))) x 8400 Example: To program 100Hz when using the recommended 4.0MHz Xtal. n= = N= r = = = INT (948982 x 100 / 4.0 x 10^6) INT (23.72) = 23 010111 (binary) ((237245 / 4.0 x 10^6) - (23 / (4 x 100))) x 8400 15.21 (round up if exactly halfway) 15 001111 (binary) R= Thus the 12-bit code is 010111001111. The Hex address represented by Bits 6, 5 and 4 in byte (1) is used as the code to indicate which tone has been decoded. This code appears in Bits 2, 1 and 0 of the SUB-AUDIO STATUS register $81. The 7 programmed tones use Hex addresses $0 - $6. Address $7 should not be used. 2003 CML Microsystems Plc 10 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A TONE CLONING Register (Hex address $9C) This register enables and disables tone cloning as shown below: $9C = $01 enables tone cloning. $9C = $00 disables tone cloning. Figure 4 shows the tone cloning routine. 8-bit Read Only Registers HEX ADDRESS/ COMMAND $81 REGISTER NAME BIT 7 (D7) BIT 6 (D6) BIT 5 (D5) BIT 4 (D4) BIT 3 (D3) BIT 2 (D2) BIT 1 (D1) BIT 0 (D0) SUB-AUDIO STATUS 0 0 0 0 TONE DECODE CTCSS RX TONE MSB LSB BIT 2 BIT 1 BIT 0 Read Only Register Description SUB-AUDIO STATUS Register (Hex address $81) Reading the SUB-AUDIO STATUS register clears the interrupt (IRQN). This register is used to indicate the status of the device as described below: (Bits 7, 6, 5 and 4) Reserved for future use. These will be set to "0" but should be ignored by user's software. This bit indicates the status of the tone decoder. A "1" indicates a tone has been detected (TONE DECODE) and a "0" indicates the loss of the tone (NOTONE). TONE DECODE means that a tone has been decoded and its characteristics are defined by the bandwidth (see SUB-AUDIO CONTROL register $80, Bits 5, 4, 3 and 2) and the CTCSS RX TONE number (see SUB-AUDIO STATUS register $81, Bits 2, 1 and 0). When Bit 6 in the SUB-AUDIO CONTROL register $80 is set to "0" the TONE DECODE Bit 3 will be set to "0". Identification of a valid tone which is not in the pre-programmed list of up to 7 tones will cause the decoder to move to the TONE DECODE state with the RX TONE address of "111" in Bits 2, 1 and 0; indicating a valid but unrecognised tone. Loss of tone will cause the NOTONE timer to be started. If loss of tone continues for the duration of the time-out period, then the decoder will move to NOTONE state and the identification of pre-programmed tones will start again. The time-out period is not user adjustable. TONE DECODE (Bit 3) CTCSS RX TONE (Bits 2, 1 and 0) These three bits hold a Hex number. Numbers $0 to $6 represent the address of the CTCSS tone decoded according to the tones programmed in the CTCSS RX PROGRAM register $84. The Hex number $7 indicates the presence of any tone that is not described by CTCSS DECODER BANDWIDTH (Bits 5, 4, 3 and 2 in the SUB-AUDIO CONTROL register $80) and CTCSS FREQUENCY (Bits 11 to 0 in the CTCSS RX PROGRAM register $84). 2003 CML Microsystems Plc 11 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A The flow chart shows the decoder and transmitter modes of operation for the example below: 1. 2. Decoder, e.g. Address 0 = 100Hz, bandwidth = 2.7%, interrupt enabled. Transmitter, e.g. Tx = 100Hz. . Note: $8X is the Hex address/command. Figure 3 Tx/Rx enabled 2003 CML Microsystems Plc 12 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A The flow chart shows the tone cloning routine. The first programmed tone set ($0-$6) will decode after typically 140ms, subsequent tone sets will decode almost instantly (i.e. the information is available at the Reply Data Output in less than 100s). Note: $8X and $9C is the Hex address/command. Figure 4 Tone Cloning 2003 CML Microsystems Plc 13 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A 1.6 Application Notes 1.6.1 General The CMX808A is intended for use in radio systems where sub-audio signalling is required for functions such as Family Radio Service (FRS) Handportables, Amateur Radio Equipment, General Mobile Radio Service (GMRS) and Short Range Business Radio. The facility to decode any of up to 7 programmed tones allows FRS designers to offer equipment which can look for personal, family or open channel codes at the same time. Codes can be used as paging codes, open chat mode codes as well as personal and family codes. Adjustable decoder bandwidths permits certainty and signal to noise performance to be traded when congestion or range limits the system performance. 1.6.2 Transmitter The transmitter is enabled with Bit 7 in the SUB-AUDIO CONTROL register $80. The Tx frequency is set using bits 0 to 12 in the CTCSS TX FREQUENCY register $83, using the formula below: A= fXTAL (Hz) 16 x fTONE (Hz) where A is the binary number programmed into the 13 bits. When Bit 7 (in the first 8 bits) is set to "1" the tone output is set at VBIAS or NOTONE without regard to the number "A" programmed. When Bit 7 is "0" the programmed tone is set on the output. Programming bits 0 to 12 to "0" sets the output to VBIAS. Powersave is also achieved by disabling the Tx (Bit 7 in the SUBAUDIO CONTROL register $80). 1.6.3 Receiver (Decode) The CTCSS Receiver (Decoder) should first be set up according to the desired characteristics. This entails setting the CTCSS DECODER BANDWIDTH in the SUB-AUDIO CONTROL register $80, also programming the centre frequencies of the desired tones in the CTCSS RX PROGRAM register $84. (It can hold up to 7 different tones). Any tone can be in any location. During operation when the device is receiving, the tones are scanned in the sequence of their location, i.e. $0 first and $6 last and once a tone is detected the remaining tones are not checked. Therefore if two tones are close enough in frequency for their bandwidths to overlap then the one in the lowest location will be detected. The CTCSS IRQ MASK in the SUB-AUDIO CONTROL register $80 should also be set as required. The CTCSS DECODER ENABLE in the SUB-AUDIO CONTROL register $80 should then be set to "1". The TONE CLONING register $9C should be set as required. When the receiver detects a change in its present state an interrupt will be generated. The change that occurred can be read from Bit 3 of the SUB-AUDIO STATUS register $81 and if a tone is indicated by these bits then the number of that tone can be read from Bits 2, 1 and 0 of the same register. The interrupt is cleared by reading the SUB-AUDIO STATUS register. 2003 CML Microsystems Plc 14 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A 1.6.4 Tx Tone Table The following table lists the commonly used CTCSS tones and the corresponding values for programming the CTCSS TX FREQUENCY register $83. Freq. (Hz) 67.0 69.3 71.9 74.4 77.0 79.7 82.5 85.4 88.5 91.5 94.8 97.4 100.0 Byte 1 (Hex) 0E 0E 0D 0D 0C 0C 0B 0B 0B 0A 0A 0A 09 Byte 2 (Hex) 93 18 95 20 AF 41 D6 6F 09 AC 4D 07 C4 STANDARD TONES Freq. Byte 1 Byte 2 (Hz) (Hex) (Hex) 09 6F 103.5 09 1C 107.2 08 CE 110.9 08 82 114.8 08 38 118.8 07 F1 123.0 07 AC 127.3 07 69 131.8 07 28 136.5 06 E9 141.3 06 AE 146.2 06 73 151.4 06 3B 156.7 Freq. (Hz) 162.2 167.9 173.8 179.9 186.2 192.8 203.5 210.7 218.1 225.7 233.6 241.8 250.3 Byte 1 (Hex) 06 05 05 05 05 05 04 04 04 04 04 04 03 Byte 2 (Hex) 05 D1 9E 6E 3F 11 CD A3 7A 54 2E 0A E7 Freq. (Hz) 62.5 64.7 159.8 Byte 1 (Hex) 0F 0F 06 Byte 2 (Hex) A0 18 1C NON-STANDARD TONES Freq. Byte 1 Byte 2 (Hz) (Hex) (Hex) 05 52 183.5 05 24 189.9 04 F8 196.6 Freq. (Hz) 199.5 206.5 229.1 Byte 1 (Hex) 04 04 04 Byte 2 (Hex) E5 BB 43 2003 CML Microsystems Plc 15 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A 1.6.5 Rx Tone Table The following table lists the commonly used CTCSS tones together with the values for programming the CTCSS RX PROGRAM register $84. N.B. The values for byte 1 and 2 below apply to tone address 0 only. These values will vary depending on the location they are programmed into. STANDARD TONES Freq. Byte 1 Byte 2 (Hz) (Hex) (Hex) 06 0B 103.5 06 48 107.2 06 86 110.9 06 C4 114.8 07 03 118.8 07 43 123.0 07 83 127.3 07 C4 131.8 08 06 136.5 08 48 141.3 08 8A 146.2 08 CD 151.4 09 42 156.7 Freq. (Hz) 67.0 69.3 71.9 74.4 77.0 79.7 82.5 85.4 88.5 91.5 94.8 97.4 100.0 Byte 1 (Hex) 03 04 04 04 04 04 04 05 05 05 05 05 05 Byte 2 (Hex) DC 0D 42 52 87 98 CF 06 18 50 8B C2 CF Freq. (Hz) 162.2 167.9 173.8 179.9 186.2 192.8 203.5 210.7 218.1 225.7 233.6 241.8 250.3 Byte 1 (Hex) 09 09 0A 0A 0B 0B 0C 0C 0C 0D 0D 0E 0E Byte 2 (Hex) 86 CA 43 88 02 48 03 4A C7 45 C4 43 C3 Freq. (Hz) 62.5 64.7 159.8 Byte 1 (Hex) 03 03 09 Byte 2 (Hex) 9C CB 4C NON-STANDARD TONES Freq. Byte 1 Byte 2 (Hz) (Hex) (Hex) 0A C6 183.5 0B 41 189.9 0B 87 196.6 Freq. (Hz) 199.5 206.5 229.1 Byte 1 (Hex) 0B 0C 0D Byte 2 (Hex) C3 0A 83 2003 CML Microsystems Plc 16 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A 1.7 1.7.1 Performance Specification Electrical Performance 1.7.1.1 Absolute Maximum Ratings Exceeding these maximum ratings can result in damage to the device. Min. -0.3 -0.3 -30 -20 Max. 7.0 VDD + 0.3 +30 +20 Units V V mA mA Supply (VDD - VSS) Voltage on any pin to VSS Current into or out of VDD and VSS pins Current into or out of any other pin E3 Package Total Allowable Power Dissipation at Tamb = 25C ... Derating Storage Temperature Operating Temperature Min. -55 -40 Max. 300 5 +125 +85 Units mW mW/C C C P4 Package Total Allowable Power Dissipation at Tamb = 25C ... Derating Storage Temperature Operating Temperature Min. -55 -40 Max. 800 13 +125 +85 Units mW mW/C C C 1.7.1.2 Operating Limits Correct operation of the device outside these limits is not implied. Notes Min. 3.0 -40 3.9996 Max. 5.5 +85 4.0004 Units V C MHz Supply (VDD - VSS) Operating Temperature Xtal Frequency 2003 CML Microsystems Plc 17 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A 1.7.1.3 Operating Characteristics For the following conditions unless otherwise specified: Xtal Frequency = 4.0MHz Audio Level 0dB ref. = 308mVrms at 1kHz VDD = 3.0V to 5.0V, Tamb = -40C to +85C. Composite Signal = 308mVrms at 1kHz + 75mVrms Noise + 31mVrms Sub-Audio Signal Noise Bandwidth = 5kHz Band Limited Gaussian Notes DC Parameters At VDD = 3.0V IDD (powersaved) IDD (Encoder or Decoder only Operating) At VDD = 5.0V IDD (powersaved) IDD (Encoder or Decoder only Operating) "C-BUS" Interface Input Logic "1" Input Logic "0" Input Leakage Current (Logic "1" or "0") Input Capacitance Output Logic "1" (IOH = 120A) Output Logic "0" (IOL = 360A) "Off" State Leakage Current (Vout = VDD) AC Parameters CTCSS Decoder Sensitivity Response Time De-Response Time Frequency Range CTCSS Encoder Frequency Range Tone Frequency Resolution Tone Amplitude Tolerance Total Harmonic Distortion Audio Band-Pass Filter Passband Passband Gain (at 1.0kHz) Passband Ripple (w.r.t. gain at 1.0kHz) Stopband Attenuation Residual Hum and Noise Alias Frequency Audio Attenuator Nominal Adjustment Range Attenuation Accuracy Step Size Min. Typ. Max. Units 2 2 - 0.2 1.3 0.3 2.0 mA mA 2 2 - 0.5 3.2 0.8 4.8 mA mA 3 70% -1.0 90% - - 30% 1.0 7.5 10% 10.0 VDD VDD A pF VDD VDD A (Pure CTCSS Tone) (Composite Signal) (Composite Signal) 5 60.0 -26.0 140 145 - 251 dB ms ms Hz 1 60.0 -1.0 - 0 3.0 251 0.3 +1.0 - Hz % dB % 6 6 6 6 350 -2.0 30.0 - 0 -50.0 62.5 3000 +0.5 - Hz dB dB dB dBp kHz 0 -1.5 - 1.6 48 1.5 - dB dB dB 2003 CML Microsystems Plc 18 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A Notes Output Impedances TX SUB-AUDIO OUT TX/RX AUDIO OUT TX/RX AUDIO OUT VOLUME OUT Rx Amplifier Open Loop Gain Unity Gain Bandwidth Input Impedance Output Impedance Min. Typ. Max. Units (Enabled) (Enabled) (Disabled) (Enabled) 7 - 2.0 600 500 600 - k k (I/P = 1mV at 100Hz) (at 100Hz) (Open Loop) 10.0 - 70.0 5.0 6.0 - dB MHz M k Xtal/Clock Input Pulse Width ('High' or 'Low') Input Impedance (at 100Hz) Gain (I/P = 1mVrms at 100Hz) 4 40.0 10.0 20.0 - - ns M dB Notes: 1. 2. 3. 4. 5. 6. 7. At VDD = 5.0V only. Signal levels or currents are proportional to VDD. Not including any current drawn from the device pins by external circuitry. IRQN pin. Timing for an external input to the XTAL/CLOCK pin. With input gain components set as recommended in Figure 2. See filter response (Figure 5). Small signal impedance VDD = 5.0V and Tamb=25C. A minimum load resistance of 6k is suggested. 1.7.1 Electrical Performance (continued) 5 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 10 100 1,000 Frequency (Hz) 10,000 100,000 Figure 5 Audio Band-Pass Filter Frequency Response 2003 CML Microsystems Plc 19 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A 1.7.1 Electrical Performance (continued) Timing Diagrams Figure 6 "C-BUS" Timing For the following conditions unless otherwise specified: Xtal Frequency = 4.0MHz, VDD = 3.0V to 5.0V, Tamb = -40C to +85C. Parameter Notes Min. Typ. Max. Units tCSE tCSH tHIZ tCSOFF tNXT tCK "CS-Enable to Clock-High" Last "Clock-High to CS-High" "CS-High to Reply Output 3-state" "CS-High" Time between transactions "Inter-Byte" Time "Clock-Cycle" time 2.0 4.0 2.0 4.0 2.0 2.0 - s s s s s s Notes: 1. Depending on the command, 1 or 2 bytes of COMMAND DATA are transmitted to the peripheral MSB (Bit 7) first, LSB (Bit 0) last. REPLY DATA is read from the peripheral MSB (Bit 7) first, LSB (Bit 0) last. 2. Data is clocked into and out of the peripheral on the rising SERIAL CLOCK edge. 3. Loaded commands are acted upon at the end of each command. 4. To allow for differing Controller serial interface formats "C-BUS" compatible ICs are able to work with either polarity SERIAL CLOCK pulses. 2003 CML Microsystems Plc 20 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A 1.7.2 Packaging Figure 7 Mechanical Outline: Order as part no. CMX808AE3 Figure 8 Mechanical Outline: Order as part no. CMX808AP4 2003 CML Microsystems Plc 21 D/808A/6 Family Radio CTCSS 'Type 2' Encoder and Decoder CMX808A Handling precautions: This product includes input protection, however, precautions should be taken to prevent device damage from electro-static discharge. CML does not assume any responsibility for the use of any circuitry described. No IPR or circuit patent licences are implied. CML reserves the right at any time without notice to change the said circuitry and this product specification. CML has a policy of testing every product shipped using calibrated test equipment to ensure compliance with this product specification. Specific testing of all circuit parameters is not necessarily performed. www.cmlmicro.com For FAQs see: www.cmlmicro.com/products/faqs/ For a full data sheet listing see: www.cmlmicro.com/products/datasheets/download.htm For detailed application notes: www.cmlmicro.com/products/applications/ Oval Park, Langford, Maldon, Essex, CM9 6WG - England. 4800 Bethania Station Road, Winston-Salem, NC 27105 - USA. No 2 Kallang Pudding Road, #09 to 05/06 Mactech Industrial Building, Singapore 349307 No. 218, Tian Mu Road West, Tower 1, Unit 1008, Shanghai Kerry Everbright City, Zhabei, Shanghai 200070, China. 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